Minimizing EMI from Via Transitions in Multilayer PCBs
Via transitions are common sources of electromagnetic interference in high-speed multilayer PCBs. When a signal changes layers, its return current must also move between reference planes. If that transition is not properly controlled, the current takes a longer path, increasing loop area, inductance, and radiation. The issue is not the via alone. The complete structure matters: via barrel, pads, antipads, reference planes, unused stubs, nearby ground vias, dielectric thickness, and adjacent conductors.
PCB DESIGNPCB MANUFACTURING
Atanu
8/28/20263 min read
Minimizing EMI from Via Transitions in Multilayer PCBs
Via transitions are common sources of electromagnetic interference in high-speed multilayer PCBs. When a signal changes layers, its return current must also move between reference planes. If that transition is not properly controlled, the current takes a longer path, increasing loop area, inductance, and radiation.
The issue is not the via alone. The complete structure matters: via barrel, pads, antipads, reference planes, unused stubs, nearby ground vias, dielectric thickness, and adjacent conductors.
How vias generate EMI
Via transitions generate EMI through four main mechanisms.
First, vias introduce parasitic inductance and capacitance. These create local impedance changes that produce reflections and ringing.
Second, the return path can become discontinuous. If the signal changes from a ground-referenced layer to a power-referenced layer, the return current needs a low-impedance path between the planes.
Third, unused portions of through-hole vias act as stubs. At certain frequencies, a stub can approach a quarter wavelength and behave as a resonant radiator.
Fourth, power and ground planes can form cavity structures. A fast via transition can inject energy into these cavities, allowing noise to spread across the board and radiate at the edges.
Use return vias close to signal vias
For important single-ended transitions, place 2–4 ground return vias close to the signal via. Keep the arrangement symmetrical and connect the return vias to all relevant ground planes.
A starting spacing of 50–100 mils may be suitable for some designs, but higher-frequency structures often require a much closer arrangement. For shielding, a useful starting rule is:
p ≤ λ_eff / 20
where p is the via-fence pitch and λ_eff is the guided wavelength at the highest significant frequency.
Return vias serve two purposes:
They provide a short, low-inductance return path.
They confine the electromagnetic field around the transition.
Use stitching capacitors carefully
When a signal changes reference between ground and power planes, a stitching capacitor can provide an AC return path.
A common starting value is:
C_stitch = 0.1 µF
The capacitor should be placed very close to the transition, with short connections and nearby power and ground vias. At high frequency, mounting inductance can dominate the capacitor’s behaviour:
Z_total ≈ j × ω × L_mount + 1 / (j × ω × C)
A physically large capacitor with long connections may therefore be less effective than a smaller capacitor with a compact mounting loop.
Remove resonant stubs
Backdrilling removes the unused portion of a plated through-hole via. It is useful for thick boards and high-speed channels where the remaining stub would fall within the signal bandwidth.
Blind, buried, and microvias can also reduce stub length, but they increase fabrication complexity and cost.
Via-in-pad structures can shorten transitions under BGAs and QFNs. Mechanically drilled via-in-pad structures normally require filling and capping to prevent solder wicking.
Optimise the stackup
The best EMI solution often starts with the layer stackup.
Place each high-speed signal layer close to a continuous reference plane. Prefer ground as the local reference for critical channels. Avoid routing across plane splits and use central ground-plane structures where possible.
A good stackup reduces the need for corrective components and makes return-current behaviour more predictable.
Validate the design
Use electromagnetic simulation for critical transitions. Include the complete via structure, not just the signal barrel. Model pads, antipads, return vias, planes, dielectric materials, and nearby structures.
Review:
S-parameters.
Insertion loss.
Return loss.
TDR impedance.
E-field and H-field distribution.
Differential-to-common-mode conversion.
Return-current density.
Near-field probing on prototypes can identify radiation hotspots around transitions, board edges, and plane gaps.
Final checklist
Place return vias close to signal vias.
Keep reference planes continuous.
Use stitching capacitors only when required.
Backdrill long unused stubs.
Consider blind, buried, or microvias.
Maintain differential symmetry.
Optimise pad and antipad geometry.
Confirm the stackup with the fabricator.
Include all via requirements in the fabrication drawing.
Validate critical structures before production.
The central principle is simple: keep the forward and return currents physically close. A smaller loop produces lower inductance, less radiation, and a more predictable high-speed channel.
